Grenoble, France - June 04, 2018

Dolphin Integration announces the availability in free download of its innovative IDE SmartVision™ supporting the RISC-V Instruction Set Architecture (ISA).

A suitable software development environment is fundamental for optimizing designs in terms of power consumption, area (code density) and performances. Thanks to its IDE, Dolphin integration enables early in the design flow to meet these requirements.

SmartVision™ is an open environment allowing the design of complete subsystems based on processor cores and peripherals. It provides an intuitive interface as well as the necessary tools to debug embedded software by simulation or by In Circuit Emulation. Its key benefits include:

  • an API to describe behavioral models of new components
  • advanced debug features with a breakpoint composer for complex behavior analysis
  • a versatile solution for embedded software debug by using In Circuit Emulation with FPGA/ASIC and by simulating a Cycle Accurate Bit Accurate (CABA) model
  • a power optimization and estimation solution
  • the Built-In-Real-time Debugger, BIRD, a debug unit, with JTAG interface

The support of RISC-V through the RV32 Tornado subsystem offers a complete turnkey solution to configure and optimize ultra-low power SoCs. It includes:

  • RISC-V Instruction Set Simulator with configurable timing annotations
  • RISC-V toolchain (GCC)
  • RISC-V musl libraries precompiled for diverse RISC-V extensions

Furthermore, for easy compatibility with the RISC-V ecosystem, the support of the upcoming debug specification is in progress.

Discover the innovative IDE SmartVision™

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Disclaimer

Dolphin Integration SA published this content on 04 June 2018 and is solely responsible for the information contained herein. Distributed by Public, unedited and unaltered, on 04 June 2018 12:57:03 UTC