IBM and Lam Research Corp. announced a collaboration aimed at developing new processes and materials to support sub-1nm logic scaling. Building on a long record of successful partnerships, the new agreement will focus on the joint development of novel materials, fabrication processes, and High NA EUV lithography processes to advance IBM's logic scaling roadmap.

IBM and Lam have collaborated for more than a decade to advance logic fabrication, notably enabling early generations of 7nm, nanosheet, and EUV process technologies. Under this new five-year agreement, the companies intend to extend logic scaling to the sub-1nm node. The work will focus on developing new materials, advanced etch and deposition capabilities for increasingly complex device architectures, and new High NA EUV lithography processes to enable next-generation interconnect and device patterning and accelerate industry adoption.

Using IBM's advanced research capabilities at the NY Creates Albany NanoTech Complex and Lam's end-to-end process tools and innovations ? including Aether dry resist technology, Kiyo and Akara etch platforms, Striker and ALTUS Halo deposition systems, and advanced packaging technologies ? the teams will build and validate full process flows for nanosheet and nanostack devices and backside power delivery.

Together, these capabilities are aimed at allowing High-NA EUV patterns to be reliably transferred into real device layers with high yield and enabling continued scaling, improved performance, and viable paths to production for future logic devices.