Synopsys, Inc. announced major advances in silicon-proven IP, AI-powered EDA flows, and system-level enablement across TSMC's most advanced processes and packaging technology nodes, including the TSMC 3nm and 2nm families, as well as A16 with Super Power Rail and A14. By unifying intelligent digital, analog, and verification flows, advanced 3D multi-die design, and optical-to-electrical design capabilities, Synopsys helps engineers improve quality of multiphysics results and accelerate development cycles from silicon to systems for increasingly complex AI and high-performance computing designs. Synopsys and TSMC have enhanced enablement across TSMC's 3DFabric technologies, including TSMC-SoIC and CoWoS for 5.5x reticle interposer sizes.
Synopsys' 3DIC Compiler, a unified exploration-to-signoff platform, enables designs using TSMC's 3DFabric technologies with automation capabilities for productivity gains. Synopsys' 3DIC Compiler integrates with RedHawk-SC, RedHawk-SC Electrothermal, and Ansys HFSS software to deliver multiphysics analysis for thermal, power, and high-speed signal integrity. Collaboration with Synopsys RedHawk-SC for digital power integrity, Synopsys Totem for analog power integrity, and HFSS-IC Pro for electromagnetic extraction expands from TSMC A16 to A14.
Synopsys Totem-SC provides analog power integrity signoff at ultrahigh-capacity for large N2-based designs and embedded memories, while Synopsys PathFinder-SC extends multi-die electrostatic discharge (ESD) signoff coverage to N2. Cloud-based multiprocessor and GPU acceleration further shortens turnaround time, enabling multiphysics design teams to iterate rapidly across complex, thermally constrained 3D assemblies. Expanded multiphysics simulation and analysis capabilities strengthen coverage across photonic, electrical, and thermal domains.
Enablement for COUPE spans Ansys Zemax OpticStudio for optical path simulation, Ansys Lumerical for photonic device simulation, HFSS-IC Pro for electromagnetic extraction, and RedHawk-SC Electrothermal for thermal and electrical co-simulation. Together, these tools support the design of co-packaged optical solutions for high-bandwidth datacenter connectivity. Synopsys is collaborating with TSMC on agentic run assistance in Synopsys Fusion Compiler on TSMC's A14 process using NanoFlex Pro architecture identifying timing improvement opportunities at different stages of the design flow for better quality of results.
In addition, enablement of AI-assisted physical verification in Synopsys IC Validator is on-going, aiming to accelerate the identification and resolution of DRC violations for faster tapeout quality results.
