Lattice FPGAs Power Award-winning Hyperloop Design
Posted 09/30/2021 by David Thomas
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Lattice recently received a 2021 Sustainability Leadership Award from the Business Intelligence Group. In the press release announcing the award, our CEO Jim Anderson said, "As the low power programmable leader, our dedication to power efficiency and sustainability is fundamental to everything we do." That commitment to sustainability is enabling development of low power applications that could revolutionize markets in a sustainable way. For example, I recently learned about an exciting new project featuring low power Lattice FPGA technology developed by a student-led design team that could make transportation of both cargo and people more eco-friendly.
Swissloop is a student organization supported by ETH Zurich, conducting research on Hyperloop technology and its applications in the real world. In past years, Swissloop has taken part in the SpaceX Hyperloop competition, and the team's most recent design won six awards at the European Hyperloop Week (EHW) in Spain, including the complete pod and power electronics award.

The Swissloop team

The team developed a levitating Hyperloop pod (which they've dubbed Simon Ammann in honor of the famous Swiss ski jumper) based on a self-developed linear induction motor. The design task was complex, and development of the electronic systems for overall system control as well as sub-systems for controlling sensors and power management took a team of 25 people eleven months to develop.

The pod's power electronics, inverter control, battery management, and vehicle control (which includes the sensor network) are all driven by a self-developed general control board (GCB) featuring a low power Lattice MachXO3™ FPGA and a 32-bit ARM Cortex M7 microcontroller (as seen in the picture below). Using a common platform for the different subsystems allowed for fast and efficient code development.

The Swissloop GCB is equipped with a MachXO3 FPGA, an MCU, various general purpose I/O pins, and an SD card slot for real-time data logging

With a total apparent power of 270 kVA, the inverter system is a safety critical component and requires special treatment for control signal generation, error handling, and accidental activation of the MOSFETs (which could lead to short circuits). To address this, the team decided to use the MachXO3 FPGAs to aggregate data signals from the microcontrollers and sensors and generate the control signals for the inverter. By doing this, they were able to create a 6x redundant safety system, implemented in hardware, which was tested extensively using simulations. The result: the pod's power electronics didn't experience a single unexpected error throughout the entire season.

The team also used the Lattice FPGAs to solve a problem encountered during the prototype stage. Even with proper shielding and the use of differential signaling, the pod's control signals had issues with electromagnetic interference. This was addressed by implementing a signal filter in the FPGA that ignored short level changes in the signal. This filtering also allowed the Swissloop team to synchronize the switching of all MOSFETs in the sub-millisecond range in order to accurately control system behavior.

It's exciting to see the innovative ways in which developers are leveraging the strong performance and low power consumption of Lattice FPGAs to enable next-generation technologies that are more sustainable. For more information about Lattice's commitment to actively managing its environmental, social, and governance impacts, please visit https://www.latticesemi.com/About/ESG.

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  • FPGA
  • MachXO3
  • low power
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Lattice Semiconductor Corporation published this content on 30 September 2021 and is solely responsible for the information contained therein. Distributed by Public, unedited and unaltered, on 30 September 2021 20:21:01 UTC.