The FPGA Memory Connection
Posted 04/07/2021 by Bob O'Donnell
Some of the least known and most underappreciated pieces of tech equipment are what's known as 'embedded' devices. These workhorses power critical capabilities in everything from health care to factory floors to home appliances and beyond. They incorporate the kind of computing technology you might find in a PC, smartphone or other intelligent device, but are typically wrapped in a package or mode of operation that's designed for a singular purpose, such as a smart speaker, a factory controller, or an automotive camera system.
Because of the essential tasks which many of these embedded devices perform, it's critical that they are able to operate reliably and start up (or restart, in the case of a power failure or firmware update) very quickly. As a result, a great deal of engineering effort is put into ensuring this happens and several critical components are required to make sure it's even possible. Key among them are fast memory and an FPGA, which monitors and directs the process of loading a device's firmware into memory so that it can properly start.
While that sounds like it might be a relatively simple task, it turns out there can be numerous obstacles along the way. To begin with, there aren't any 'official' industry standards for making these connections. SPI, or Serial Peripheral Interface, has become a de facto standard for enabling the logical connections between a device's firmware and memory, but physical interface standards can still vary. As a result, it's important for companies to find partners with whom they can work to ensure that both the physical and logical requirements can be met to guarantee stable, reliable connections between these essential base-level elements.
To make the process easier for its customers, FPGA maker Lattice Semiconductor has partnered for many years with Micron, one of the world's leading memory suppliers, to offer SPI-based solutions for embedded devices. The two companies have worked hard to ensure compatibility between their respective elements, and Micron has even created an extensive compatibility guide that clarifies exactly which of its various types and sizes of memory SKUs work with different Lattice FPGAs. Again, while that sounds simple, the enormous range of choices from each side can easily lead to confusion, so the compatibility guide serves a very important role.
Technically, communications between the FPGA and embedded flash memory occur via a mechanism called SFDP (Serial Flash Discovery Parameters), which is used to confirm the SPI memory is ready to begin the boot process. Then, through a version of SPI called Quad SPI (Octal SPI support from Lattice is coming), the firmware instructions are loaded into memory so that the embedded device can boot. Thanks to the improvements in these connections, the speed of these data transfers has increased from 33 MHz to 150 MHz, and that translates from boot times that took as much as 50 milliseconds down to just 11 msec. While in real-world numbers these are both extremely short, in a machine-driven world of embedded devices, these differences can matter.
The Lattice Certus™-NX Versa Evaluation Board is a good example of the collaboration between Lattice and Micron. The board uses SPI NOR flash (the smaller device outlined in yellow, MT25QU128ABA1ESE-0SIT) and DDR3 DRAM (the larger device outlined in yellow, MT41K64M16TW-107:J) technologies from Micron.
The Lattice Sentry™ Demo Board for the Mach™-NX FPGA uses four SPI NOR flash devices from Micron (MT25QL256BBB8ESF-0AAT), outlined in yellow above
In addition to talking to flash memory at bootup, Lattice works with Micron DRAM memory during device operation. To that end, Lattice has integrated DDR3 DRAM and LPDDR memory controllers into the FPGAs designed for the embedded market to ensure speedy and flawless operation with Micron memory. The end result is an easier solution for engineers to incorporate into their designs and that, in turn, speeds up the process of creating new products.
The collaboration between Lattice and Micron improves device operational performance by allowing the FPGA to access a larger amount of external DRAM memory to augment the on-chip SRAM built into FPGAs. DRAM is produced on cutting-edge semiconductor process technology nodes, which means the memories can get faster and less expensive because of the technological advancements that these process nodes offer. Once again, this translates into lower costs and more flexibility for embedded device designers. It also allows companies to purchase best-of-breed components as they design their devices, instead of having to make compromises.
Ultimately, the goal of the partnership between Lattice and Micron is to assure that two leader suppliers can each provide best-of-breed products that work well together and allow their shared customers to benefit. That's clearly a connection worth having.
For more specific information on compatibility between Lattice FPGAs and Micron memory technologies, please visit the Compatibility Guide on the Micron website.
Bob O'Donnell is the president and chief analyst of TECHnalysis Research, LLC a market research firm that provides strategic consulting and market research services to the technology industry and professional financial community. You can follow him on Twitter @bobodtech.
Nexus, Certus-NX, Mach-NX
Lattice Semiconductor Corporation published this content on 07 April 2021 and is solely responsible for the information contained therein. Distributed by Public, unedited and unaltered, on 07 April 2021 23:01:02 UTC.