SkyWater Technology announced a new component of its RH90 IP ecosystem to enable 90 nm strategic rad-hard by process solutions for microelectronic devices used in harsh environments. Mobile Semiconductor will provide two static random-access memory (SRAM) compilers for SkyWater customers developing products on its maturing RH90 platform. This is the new step in SkyWater's RH90 technology roadmap.

The company has leveraged the $170 million investment by the Department of Defense (DOD) to broaden onshore production capabilities for strategic rad-hard electronics. Through the DOD's support, SkyWater also provides complementary technologies for commercial applications in extreme environments such as space and medical imaging. Mobile Semiconductor's 90 nm strategic rad-hard single port SRAM and dual port SRAM memory compilers are built on a soft error resistant fully depleted silicon on insulator (FDSOI) technology.

Strategic rad-hard performance is achieved using dual interlocked storage cell elements (DICE). These compilers incorporate additional innovative rad-hard by design (RHBD) techniques including triple mode redundancy (TMR), DICE latches, and critical charge analysis to reduce single event transients (SET) and single event upset (SEU), as well as bit separation to reduce multi-bit upset (MBU). Optional multi-bit error detection and single-bit error correction is available to reduce soft error rates even further.

SkyWater's RH90 platform is based on MIT Lincoln Laboratory's 90 nm FDSOI CMOS process technology with enhancements including dual gate transistors and copper dual damascene interconnect. Early access multi-project wafer (MPW) and dedicated product development engagements are available for customers to develop next generation products.