STMicroelectronics and Soitec Announce the Next Stage of Their Cooperation on Silicon Carbide Substrates
designs, and overall system-design cost savings - all key parameters and factors for success in automotive and industrial systems. Transitioning from 150mm to 200mm wafers will enable a substantial capacity increase, with almost twice the useful area for manufacturing integrated circuits, delivering 1.8 - 1.9 times as many working chips per wafer. SmartSiC is a proprietary Soitec technology which uses Soitec proprietary SmartCut technology, to split a thin layer of a high quality SiC 'donor' wafer, and bond it on top of a low resistivity 'handle' polySiC wafer. The engineered substrate then improves device performance and manufacturing yields. The prime quality SiC 'donor' wafer can be reused multiple times, significantly reducing the overall energy consumption required to produce it.