In fact, when performing CGNAT and L4 traffic processing functions within the SmartNICs' FPGA, solution testing has shown that total traffic throughput can be increased by around 30% and VE compute usage may be cut from around 80% to as little as 5%. Not only does this make the solution capable of handling greater volumes of user traffic, but it also improves system reliability while affording the BIG-IP VE extra compute cycles to dedicate to other security and traffic management tasks.

A further benefit of handling these functions within a SmartNIC is reduced latency. As depicted in figure 1, qualifying connections now effectively bypass the BIG-IP VE meaning that around 500μs can be shaved off total connection times - a small but significant saving especially for time-sensitive markets like finance and healthcare, or media organizations providing live streaming over edge Content Delivery Networks (CDN).

The BIG-IP VE for SmartNICs solution is available as an add-on to new, or existing High Performance BIG-IP VE's and looking forward, F5 will continue to develop and deliver incremental use case support within future releases. For more information about any of the use cases touched upon here and more solution specific details, take a look at this Solution Overview (add link).

It's an unthrottled version of BIG-IP VE that's licensed based on the number of virtual cores attributed to the VE. i.e. instead of buying a 10Gbps VE where you're limited to 10Gbps throughput, you can buy a 8vCPU High Performance VE where you can use 8 virtual cores and the throughput is not limited by F5, but rather by what's possible by the compute power available. They're available from 8 to 24vCPU in 4vCPU increments (8,12,16,20,24).

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F5 Networks Inc. published this content on 08 September 2021 and is solely responsible for the information contained therein. Distributed by Public, unedited and unaltered, on 06 October 2021 18:35:07 UTC.