Arteris, Inc. announced the immediate availability of the latest release of Ncore cache coherent network-on-chip (NoC) IP. Ncore ensures low latency integration of hardware accelerators into a coherent domain, enabling the speed and efficiency required for cutting-edge applications in complex SoC designs. Deploying Ncore can save SoC design teams upwards of 50 years of engineering effort per project compared to manually generated interconnect solutions.

The latest release of Ncore works with multiple processor IPs, including RISC-V and the next-generation Armv9 Cortex processor IP. Ncore boasts multi-protocol support, allowing seamless integration of IPs connected to the same NoC fabric. Designers can choose from CHI-E, CHI-B and ACE fully coherent agent interfaces and ACE-Lite IO-coherent interfaces.

AXI is also supported for interfacing with sub-systems or devices without coherency requirements. These capabilities enhance the flexibility and adaptability of Ncore, making it an ideal solution for complex and evolving SoC designs, including safety-critical applications. With configurability and scalability at its core, Ncore empowers SoC designers to meet specific power, performance and area requirements with the flexible fine-tuning of the NoC architecture.

Ncore is also ISO 26262 certified, helping design teams address the critical demands of automotive and industrial safety applications with requirements from ASIL B to ASIL D. Ncore's ISO 26262 certification underscores Arteris' ongoing commitment to delivering safe, secure and reliable technology to its global customers. Ncore supports direct connections for heterogeneous, asymmetric systems and other flexible connectivity options, ensuring adaptability to various applications across automotive, industrial, communications and enterprise computing markets. Ncore cache coherent interconnect IP is an ideal companion to FlexNoC, Arteris' industry-leading non-coherent interconnect IP.