SiFive and Synopsys, Inc. announced their new collaboration to accelerate the design and verification of SiFive RISC-V processor-based SoCs. The collaboration provides mutual customers with Synopsys Fusion QuickStart Implementation Kits (QIKs) that optimize the power, performance and area (PPA) of SiFive's Intelligence™ X280 and Performance™ P550 processor cores. Synopsys Fusion QIKs for SiFive processors leverage the Synopsys Fusion Compiler™ RTL-to-GDSII product and Synopsys Design Space Optimization (DSO.ai™), which autonomously explores multiple design spaces to enhance PPA metrics.

By using the implementation scripts and reference guides included in the QIKs, designers can accelerate the development of their SiFive processor-based SoCs. In addition to the Fusion QIKs, SoC designers using SiFive RISC-V processors can take advantage of key Synopsys technologies, including: The Synopsys Digital Design Family, which provides a framework to achieve optimum PPA across all leading technology processes via a shared engine for implementation, test and signoff of power-optimized architectures for SiFive cores. The family also includes Synopsys Silicon Lifecycle Management Family optimization software, which quickly enables the best configurations of their software stack to maximize performance of SiFive cores.

The Synopsys Verification Family, which speeds software development, verification throughput and time-to-market for SiFive based designs, including virtual prototyping with models of SiFive's cores, simulation, formal verification, hardware and software debug, emulation, FPGA prototyping and verification IP. The silicon-proven Synopsys Interface IP products for the most widely used protocols, which deliver the required low latency, high performance, power efficiency and security for data-intensive systems implementing the latest SiFive processor cores.