Advanced Semiconductor Engineering Inc. announced its latest Fan-Out-Chip-on-Substrate-Bridge (FOCoS-Bridge) technology breakthrough, achieved through qualifying a large 70mm x 78mm package that incorporates two ASICs and eight High Bandwidth Memory (HBM) devices connected through eight silicon bridges. This large package features two identical 47mm x 31mm FOCoS-Bridge fan-out structures integrated side-by-side, with each comprising an ASIC with four HBMs and four silicon bridges, effectively integrating nine components in each 47mm x 31mm fan-out package, which is almost 2X the silicon reticle size. Positioned under the ASE VIPack™?

platform, this FOCoS-Bridge technology is designed to be highly scalable, enabling seamless integration into complex chip architectures while delivering high density die-to-die (D2D) connections, high input/output (I/O) counts, and high-speed signal transmission for evolving Artificial Intelligence (AI) and High-Performance Compute (HPC) requirements. FOCoS-Bridge technology addresses the increasing demand for higher bandwidth and faster data transfer rates in AI and HPC applications. It leverages the advantages of highly integrated fan-out structures to overcome the limitations of traditional electrical interconnects, and enables high-speed, low-latency, and energy-efficient data communication between processors, accelerators, and memory modules.

FOCoS-Bridge establishes the foundation for embedding passives and active chips in the fan-out package and provides options of decoupling capability integration for power delivery optimization and active dies for interconnection between to certain functions, such as memory, I/O, and more. ASE's FOCoS-Bridge features ultra-high density D2D interconnection with submicron L/S, enabling high bandwidth at low latency for chiplet integration. The use of a silicon bridge die enables a die edge linear density (wire/mm/layer) that is nearly 200x higher than the traditional organic flip chip package.

In addition, FOCoS-Bridge enables broad D2D interconnects for both serial and parallel interfaces and associated standards such as XSR, BOW, OpenHBI, AIB, and UCIe.