MaxLinear, Inc. announced it has launched the MXL17xxx family of devices (?Sierra?), a highly integrated SoC optimized for 4G/5G Open Radio Access Network (RAN) radio units (RU). Sierra is an innovative single-chip platform that flexibly supports major RU applications including traditional macro, massive MIMO, picocell, all-in-one small cells, and more. Sierra integrates the following sub-systems into a single chip, providing a complete software-programmable radio signal processing engine for Open RUs.

RF transceiver supporting up to 8 transmitters, 8 receivers, and 2 feedback receivers, Digital Front End (DFE) including DPD, crest factor reduction (CFR), and Passive Intermodulation (PIM) cancellation, Low-PHY baseband processor supporting 5G, 4G, and NB-IoT air interfaces and O-RAN Alliance Split 7.2x fronthaul interface. Sierra?s complete system integration yields a feature-rich, high-performance RU building block with low power consumption, board footprint, and implementation cost that reduces the need for multiple FPGAs/ASICs and massively simplifies new O-RU development. Designers can rapidly build new macro and picocell O-RUs using just a single Sierra device by adding an appropriate RF front end.

Massive MIMO O-RU are created by tiling an array of Sierra devices and connecting them to a central beamforming solution. This system modularity and flexibility makes Sierra an ideal radio platform building block to maximize design reuse and dramatically speed up the development of new O-RUs. At the heart of Sierra is MaxLIN?, MaxLinear?s leading field-proven DPD solution for wideband power amplifier linearization, supporting up to 400MHz of occupied bandwidth.

MaxLIN?s linearization performance exceeds the 3rd Generation Partnership Project (3GPP) and U.S. Federal Communications Commission (FCC) unwanted emissions requirements with margin while delivering high PA efficiency, thereby minimizing RU energy consumption, and making radios lighter and more cost-effective. MaxLIN?s advanced algorithms feature enhancements to correct for both long-term and short-term nonlinear dynamics including GaN charge trapping and thermal transients, critical for high-power Macro applications. It optimally supports different power amplifier (PA) architectures, technologies, and power levels for all potential RU applications from macro to picocells.

In addition, OEMs also have the option to implement their own DPD using the Sierra on-chip compute resources.