Highlights:

  • Boosts DDR5 data rate by 17% while lowering latency and power in 2nd-generation Registering Clock Driver (RCD)
  • Provides key enablement of 5600 MT/s DDR5 RDIMMs for server main memory
  • Demonstrates sustained Rambus product leadership in DDR5 memory interface chips for next-generation servers

SAN JOSE, Calif. - Oct. 13, 2021 - Rambus Inc. (NASDAQ: RMBS), a premier chip and silicon IP provider making data faster and safer, today announced it is now sampling its 5600 MT/s 2nd-generation RCD chip to the major DDR5 memory module (RDIMM) suppliers. This new level of performance represents a 17% increase in data rate over the first-generation 4800 MT/s Rambus DDR5 RCD. With key innovations, Rambus is able to deliver 5600 MT/s performance at lower latency and power while optimizing timing parameters for improved RDIMM margins.

"Advanced workloads are driving an insatiable demand for greater memory bandwidth," said Shane Rau, research vice president, Computing Semiconductors at IDC. "It's essential that DDR5 ecosystem players like Rambus continue to raise the bar on performance to meet the rapidly rising needs of data center applications."

"The RCD is a mission-critical enabler of DDR5 server DIMMs that provide the bandwidth and capacity needed in next-generation data centers," said Sean Fan, chief operating officer at Rambus. "Achieving the 5600 MT/s data rate is the latest demonstration of our continued leadership in DDR5 memory interface products."

With DDR5 memory, more intelligence is built into the DIMMs enabling up to double the data rate and four times the capacity of DDR4 DIMMs, while at the same time reducing power and increasing memory efficiency. Rambus memory interface chips are key to achieving this new level of performance for next-generation servers.

More Information:

For more information on the Rambus DDR5 RCD, please visit our website.

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Rambus Inc. published this content on 13 October 2021 and is solely responsible for the information contained therein. Distributed by Public, unedited and unaltered, on 13 October 2021 13:11:03 UTC.